Intel, HP open Merced details to the public.

Proclaiming the package to be the most significant change in architecture since the Intel 386, partners Intel Corp. and Hewlett-Packard Co. on Tuesday took the wraps off their 64-bit Merced processor. Developers and the public alike can now surf the vendors_ Web sites to review information about the next-generation processor, which is expected to reach preliminary silicon stages in the next 60 days and reach production workstations and servers during the second quarter of 2000. In a press conference, the companies revealed the general structure of the CPU. The processor will contain more than 256 internal general-purpose registers, 128 floating-point registers using 84-bit floating point numbers, parallel numeric processing, 64-bit memory addressing (over 1.84 thousand trillion addresses), MMX and SIMD extension support, and symmetrical multiple processor abilities. The vendors say Merced also will maintain full compatibility with the 32-bit Pentium and HP_s PA-RISC MAX2 instructions. Although not revealing the processor_s core clock speed, company officials estimate that Merced should perform more than six gigaflops, or six billion floating-point operations a second, where the current Pentium III does two gigaflops.