Intel scientists find wall for Moore's Law

Published: 2 December 2003 y., Tuesday
Granted, that end likely won't come for about two decades, but Intel researchers have recently published a paper theorizing that chipmakers will hit a wall when it comes to shrinking the size of transistors, one of the chief methods for making chips that are smaller, more powerful and cheaper than their predecessors. Manufacturers will be able to produce chips on the 16-nanometer manufacturing process, expected by conservative estimates to arrive in 2018, and maybe one or two manufacturing processes after that, but that's it. "This looks like a fundamental limit," said Paolo Gargini, director of technology strategy at Intel and an Intel fellow. The paper, titled "Limits to Binary Logic Switch Scaling--A Gedanken Model," was written by four authors and was published in the Proceedings of the IEEE (Institute of Electrical and Electronics Engineers) in November. Although it's not unusual for researchers to theorize about the end of transistor scaling, it's an unusual statement for researchers from Intel, and it underscores the difficulties chip designers currently face. The size, energy consumption and performance requirements of today's computers are forcing semiconductor makers to completely rethink how they design their products and are prompting many to pool design with research and development. Resolving these issues is a major goal for the entire industry. Under Moore's Law, chipmakers can double the number of transistors on a given chip every two years, an exponential growth pattern that has allowed computers to get both cheaper and more powerful at the same time.
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